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BGM15LA12 low-band lna multiplexer module data sheet revision 3.0 - 2015-07-24 power management & multimarket
edition 2015-07-24 published by in?neon technologies ag 81726 munich, germany c 2015 in?neon technologies ag all rights reserved. legal disclaimer the information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. with respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, in?neon technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. information for further information on technology, delivery terms and conditions and prices, please contact the nearest in?neon technologies of?ce ( www.in?neon.com ). warnings due to technical requirements, components may contain dangerous substances. for information on the types in question, please contact the nearest in?neon technologies of?ce. in?neon technologies components may be used in life-support devices or systems only with the express written approval of in?neon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
BGM15LA12 revision history document no.: BGM15LA12__v3.0.pdf revision history: rev. v3.0 previous version: preliminary, revision v2.4 - 2014-08-21 page subjects (major changes since last revision) all preliminary status removed 19 package outline drawing: minimum package height speci?ed 19 marking speci?cation added 20 footprint recommendation added trademarks of in?neon technologies ag aurix tm , c166 tm , canpak tm , cipos tm , cipurse tm , coolgan tm , coolmos tm , coolset tm , coolsic tm , corecontrol tm , crossave tm , dave tm , di-pol tm , drblade tm , easypim tm , econobridge tm , econodual tm , econopack tm , econopim tm , eicedriver tm , eupec tm , fcos tm , hitfet tm , hybridpack tm , isoface tm , isopack tm , i-wafer tm , mipaq tm , modstack tm , my-d tm , novalithic tm , omnitune tm , optiga tm , optimos tm , origa tm , powercode tm , primarion tm , primepack tm , primestack tm , profet tm , pro-sil tm , rasic tm , real3 tm , reversave tm , satric tm , sieget tm , sipmos tm , smartlewis tm , solid flash tm , spoc tm , tempfet tm , thinq! tm , trenchstop tm , tricore tm . other trademarks advance design system tm (ads) of agilent technologies, amba tm , arm tm , multi-ice tm , keil tm , primecell tm , realview tm , thumb tm , vision tm of arm limited, uk. ansi tm of american national standards institute. autosar tm of autosar development partnership. bluetooth tm of bluetooth sig inc. cat-iq tm of dect forum. colossus tm , firstgps tm of trimble navigation ltd. emv tm of emvco, llc (visa holdings inc.). epcos tm of epcos ag. flexgo tm of microsoft corporation. hyperterminal tm of hilgraeve incorporated. mcs tm of intel corp. iec tm of commission electrotechnique internationale. irda tm of infrared data association corporation. iso tm of international organization for standard- ization. matlab tm of mathworks, inc. maxim tm of maxim integrated products, inc. microtec tm , nucleus tm of mentor graphics corporation. mipi tm of mipi alliance, inc. mips tm of mips technologies, inc., usa. murata tm of murata manu- facturing co., microwave office tm (mwo) of applied wave research inc., omnivision tm of omnivision technologies, inc. openwave tm of openwave systems inc. red hat tm of red hat, inc. rfmd tm of rf micro devices, inc. sirius tm of sirius satellite radio inc. solaris tm of sun microsystems, inc. spansion tm of spansion llc ltd. symbian tm of symbian software limited. taiyo yuden tm of taiyo yuden co. teaklite tm of ceva, inc. tektronix tm of tektronix inc. toko tm of toko kabushiki kaisha ta. unix tm of x/open company limited. verilog tm , palladium tm of cadence design systems, inc. vlynq tm of texas instruments incorporated. vxworks tm , wind river tm of wind river systems, inc. zetex tm of diodes zetex. last trademarks update 2014-07-17 data sheet 3 revision 3.0 - 2015-07-24
BGM15LA12 contents 1 features 6 2 product description 6 3 maximum ratings 7 4 dc characteristics 8 5 rf characteristics 9 5.1 band 8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.2 band 12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.3 band 20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5.4 band 26 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.5 band 28 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6 mipi rffe speci?cation 14 7 application information 20 8 package information 22 list of figures 1 BGM15LA12 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 received clock signal constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3 bus active data receiver timing requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4 bus park cycle timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5 bus active data transmission timing speci?cation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6 requirements for vio-initiated reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7 BGM15LA12 pin con?guration (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8 BGM15LA12 application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 9 atslp-12-1 package outline (top, side and bottom views) . . . . . . . . . . . . . . . . . . . . . . . . . 22 10 marking speci?cation (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 11 footprint recommendation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 12 atslp-12-1 carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 data sheet 4 revision 3.0 - 2015-07-24
BGM15LA12 list of tables 1 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 dc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 rf characteristics band 8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6 rf characteristics band 12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 7 rf characteristics band 20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 8 rf characteristics band 26 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 9 rf characteristics band 28 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 10 mipi features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 11 startup behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 12 mipi rffe operating timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 13 register mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 14 truth table, register_0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 15 pin de?nition and function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 16 bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 data sheet 5 revision 3.0 - 2015-07-24
BGM15LA12 BGM15LA12 low-band lna multiplexer module 1 features power gain: 17.5 db low noise ?gure: 1.1 db low current consumption: 4.9 ma frequency range from 0.7 to 1.0 ghz rf output internally matched to 50
low external component count high port-to-port-isolation suitable for lte / lte-advanced and 3g applications no decoupling capacitors required if no dc applied on rf lines on chip control logic including esd protection supply voltage: 2.2 to 3.3 v integrated mipi rffe interface operating in 1.1 to 1.95 v voltage range software programmable mipi rffe usid small form factor 1.1 mm x 1.9 mm high emi robustness rohs and weee compliant package 2 product description the BGM15LA12 is a lna multiplexer module for lte low-band frequencies that increases the data rate while keeping ?exibility and low footprint. it is a perfect solution for multimode handsets based on lte-advanced and wcdma. the BGM15LA12 is controlled via a mipi rffe controller. the device con?guration is shown in fig. 12 . table 1: ordering information type package marking BGM15LA12 atslp-12-1 l1 data sheet 6 revision 3.0 - 2015-07-24
BGM15LA12 figure 1: BGM15LA12 block diagram 3 maximum ratings table 2: maximum ratings parameter symbol values unit note / test condition min. typ. max. supply voltage vdd v dd -0.3 C 3.6 v 1 voltage at rf pins rx v rx -0.3 C 0.9 v C voltage at rf output pin ao v ao -0.3 C v dd +0.3 v C voltage at gnd pins v gnd -0.3 C 0.3 v C current into pin vdd i dd C C 16 ma C rf input power p in C C 0 dbm C total power dissipation p tot C C 60 mw junction temperature t j C C 150 c C ambient temperature range t a -40 C 85 c C storage temperature range t stg -65 C 150 c C esd capability, hbm v esd_hbm C C 1000 v according to jesd22a-114 rffe supply voltage v io -0.5 C 3.6 v C rffe supply voltage levels v sclk , v sdata -0.7 C v io +0.7 (max. 3.6) v C 1 all voltages refer to gnd-nodes unless otherwise noted attention: stresses above the max. values listed here may cause permanent damage to the device. exposure to absolute maximum rating conditions for extended periods may affect device reliability. maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. data sheet 7 revision 3.0 - 2015-07-24 o
BGM15LA12 4 dc characteristics table 4: dc characteristics at t a = 25 c parameter 1 symbol values unit note / test condition min. typ. max. supply voltage v dd 2.2 C 3.3 v C supply current i dd C 4.9 5.9 ma on-mode C 0.1 2 a off-mode rffe supply voltage v io 1.1 1.8 1.95 v C rffe input high voltage 2 v ih 0.7*v io C v io v C rffe input low voltage 2 v il 0 C 0.3*v io v C rffe output high voltage 2 v oh 0.8*v io C v io v C rffe output low voltage 2 v ol 0 C 0.2*v io v C rffe control input capaci- tance c ctrl C C 2 pf C rffe supply current i vio C 15 C a idle state 1 based on the application described in chapter 7 2 sclk and sdata data sheet 8 revision 3.0 - 2015-07-24
BGM15LA12 5 rf characteristics 5.1 band 8 table 5: rf characteristics band 8 at t a = 25 c, v dd = 2.8 v, f = 925 C 960 mhz, with matching described in chapter 7 (c=1.1 pf, l=11 nh ) parameter 1 symbol values unit note / test condition min. typ. max. insertion power gain 2 j s 21 j 2 14.3 15.8 17.3 db C noise ?gure 2 nf C 1.1 1.6 db z s =50
input return loss 2 3 rl in 8 11 C db C output return loss 2 3 rl out 12 >20 C db C reverse isolation ao to rx port 2 3 1 = j s 12 j 2 19 23 C db C inband input 1db- compression point 2 3 ip 1db -11 -8 C dbm C inband input 3 rd -order inter- cept point 2 3 4 iip 3 -4 -1 C dbm f 1 =937 mhz, f 2 =947 mhz, f 12 =927 mhz isolation rx to rx port 2 5 iso 35 40 C db isolation rx to ao port 2 5 iso 24 29 C db forward direction stability 5 k >1 C C f =20 mhzC10 ghz rf rise time rx port on/off 5 t on/off 0.5 1 5 s 10 % to 90 % on; 90 % to 10 % on power up settling time 5 t bc C 10 25 s after power down mode 1 the parameter values are valid at any rx port using the matching described in chapter 7 2 pcb losses are subtracted 3 veri?cation based on aql; not 100% tested in production 4 input power = ?30 dbm for each tone 5 guaranteed by device design; not tested in production data sheet 9 revision 3.0 - 2015-07-24
BGM15LA12 5.2 band 12 table 6: rf characteristics band 12 at t a = 25 c, v dd = 2.8 v, f = 729 C 746 mhz, with matching described in chapter 7 (c=2.2 pf, l=16 nh) parameter 1 symbol values unit note / test condition min. typ. max. insertion power gain 2 j s 21 j 2 15.2 16.7 18.2 db C noise ?gure 2 nf C 1.2 1.7 db z s =50
input return loss 2 3 rl in 8 11 C db C output return loss 2 3 rl out 8 12 C db C reverse isolation ao to rx port 2 3 1 = j s 12 j 2 19 23 C db C inband input 1db- compression point 2 3 ip 1db -14 -11 C dbm C inband input 3 rd -order inter- cept point 2 3 4 iip 3 -7 -4 C dbm f 1 =732 mhz, f 2 =742 mhz, f 12 =722 mhz isolation rx to rx port 2 5 iso 34 39 C db isolation rx to ao port 2 5 iso 24 29 C db forward direction stability 5 k >1 C C f =20 mhzC10 ghz rf rise time rx port on/off 5 t on/off 0.5 1 5 s 10 % to 90 % on; 90 % to 10 % on power up settling time 5 t bc C 10 25 s after power down mode 1 the parameter values are valid at any rx port using the matching described in chapter 7 2 pcb losses are subtracted 3 veri?cation based on aql; not 100% tested in production 4 input power = ?30 dbm for each tone 5 guaranteed by device design; not tested in production data sheet 10 revision 3.0 - 2015-07-24
BGM15LA12 5.3 band 20 table 7: rf characteristics band 20 at t a = 25 c, v dd = 2.8 v, f = 791 C 821 mhz, with matching described in chapter 7 (c=1.8 pf, l=15 nh) parameter 1 symbol values unit note / test condition min. typ. max. insertion power gain 2 j s 21 j 2 15 16.5 18 db C noise ?gure 2 nf C 1.15 1.65 db z s =50
input return loss 2 3 rl in 8 11 C db C output return loss 2 3 rl out 11 19 C db C reverse isolation ao to rx port 2 3 1 = j s 12 j 2 20 24 C db C inband input 1db- compression point 2 3 ip 1db -13 -10 C dbm C inband input 3 rd -order inter- cept point 2 3 4 iip 3 -5 -2 C dbm f 1 =801 mhz, f 2 =811 mhz, f 12 =791 mhz isolation rx to rx port 2 5 iso 34 39 C db isolation rx to ao port 2 5 iso 24 29 C db forward direction stability 5 k >1 C C f =20 mhzC10 ghz rf rise time rx port on/off 5 t on/off 0.5 1 5 s 10 % to 90 % on; 90 % to 10 % on power up settling time 5 t bc C 10 25 s after power down mode 1 the parameter values are valid at any rx port using the matching described in chapter 7 2 pcb losses are subtracted 3 veri?cation based on aql; not 100% tested in production 4 input power = ?30 dbm for each tone 5 guaranteed by device design; not tested in production data sheet 11 revision 3.0 - 2015-07-24
BGM15LA12 5.4 band 26 table 8: rf characteristics band 26 at t a = 25 c, v dd = 2.8 v, f = 859 C 894 mhz, with matching described in chapter 7 (c=1.5 pf, l=13 nh) parameter 1 symbol values unit note / test condition min. typ. max. insertion power gain 2 j s 21 j 2 14.8 16.3 17.8 db C noise ?gure 2 nf C 1.2 1.7 db z s =50
input return loss 2 3 rl in 8 11 C db C output return loss 2 3 rl out 12 >20 C db C reverse isolation ao to rx port 2 3 1 = j s 12 j 2 19 23 C db C inband input 1db- compression point 2 3 ip 1db -11 -8 C dbm C inband input 3 rd -order inter- cept point 2 3 4 iip 3 -4 -1 C dbm f 1 =871 mhz, f 2 =881 mhz, f 12 =861 mhz isolation rx to rx port 2 5 iso 34 39 C db isolation rx to ao port 2 5 iso 24 29 C db forward direction stability 5 k >1 C C f =20 mhzC10 ghz rf rise time rx port on/off 5 t on/off 0.5 1 5 s 10 % to 90 % on; 90 % to 10 % on power up settling time 5 t bc C 10 25 s after power down mode 1 the parameter values are valid at any rx port using the matching described in chapter 7 2 pcb losses are subtracted 3 veri?cation based on aql; not 100% tested in production 4 input power = ?30 dbm for each tone 5 guaranteed by device design; not tested in production data sheet 12 revision 3.0 - 2015-07-24
BGM15LA12 5.5 band 28 table 9: rf characteristics band 28 at t a = 25 c, v dd = 2.8 v, f = 758 C 803 mhz, with matching described in chapter 7 (c=2 pf, l=16 nh) parameter 1 symbol values unit note / test condition min. typ. max. insertion power gain 2 j s 21 j 2 15.1 16.6 18.1 db C noise ?gure 2 nf C 1.1 1.6 db z s =50
input return loss 2 3 rl in 8 11 C db C output return loss 2 3 rl out 11 16 C db C reverse isolation ao to rx port 2 3 1 = j s 12 j 2 21 25 C db C inband input 1db- compression point 2 3 ip 1db -13 -10 C dbm C inband input 3 rd -order inter- cept point 2 3 4 iip 3 -6 -3 C dbm f 1 =775 mhz, f 2 =785 mhz, f 12 =765 mhz isolation rx to rx port 2 5 iso 34 39 C db isolation rx to ao port 2 5 iso 24 29 C db forward direction stability 5 k >1 C C f =20 mhzC10 ghz rf rise time rx port on/off 5 t on/off 0.5 1 5 s 10 % to 90 % on; 90 % to 10 % on power up settling time 5 t bc C 10 25 s after power down mode 1 the parameter values are valid at any rx port using the matching described in chapter 7 2 pcb losses are subtracted 3 veri?cation based on aql; not 100% tested in production 4 input power = ?30 dbm for each tone 5 guaranteed by device design; not tested in production data sheet 13 revision 3.0 - 2015-07-24
BGM15LA12 6 mipi rffe speci?cation all sequences are implemented according to the mipi alliance speci?cation for rf front-end control interface document version 1.10 - 26. july 2011. table 10: mipi features feature supported comment register write command sequence yes register read command sequence yes extended register write command sequence no up to 4 bytes extended register read command sequence no up to 4 bytes register 0 write command sequence yes trigger function yes trigger assignment to each control register is sup- ported programmable usid yes 3 register command sequence and extended regis- ter command sequence status register yes register for debugging reset yes by vio, power mode and rffe_status group sid yes usid_sel pin no external pin for changing usid is not implemented full speed write yes half speed read yes full speed read yes table 11: startup behavior feature state comment power status low power the chip is in low power mode after startup trigger function enabled trigger function is enabled after startup. trigger function can be dis- abled via pm_trig register. data sheet 14 revision 3.0 - 2015-07-24
BGM15LA12 table 12: mipi rffe operating timing parameter symbol values unit note / test condition min. typ. max. sclk frequency fsclk 0.032 C 26 mhz full speed 0.032 C 13 mhz half speed sclk period tsclk 0.038 C 32 s full speed 0.077 C 32 s half speed sclk low period tsclkil 11.25 C C ns full speed, see fig. 2 24 C C ns half speed, see fig. 2 sclk high period tsclkih 11.25 C C ns full speed, see fig. 2 24 C C ns half speed, see fig. 2 sdata setup time ts 1 C C ns full speed, see fig. 3 2 C C ns half speed, see fig. 3 sdata hold time th 5 C C ns full speed, see fig. 3 5 C C ns half speed, see fig. 3 sdata release time tsdataz C C 10 ns full speed, see fig. 4 C C 18 ns half speed, see fig. 4 time for data output td C C 10.25 ns full speed, see fig. 5 C C 22 ns half speed, see fig. 5 sdata rise/fall time tsdataotr 2.1 C 6.5 ns full speed, see fig. 5 2.1 C 10 ns half speed, see fig. 5 vio rise time tvio-r 10 C 450 s see fig. 6 vio reset time tvio-rst 10 C C s see fig. 6 reset delay time tsigol 0.12 C C s see fig. 6 figure 2: received clock signal constraints data sheet 15 revision 3.0 - 2015-07-24 v tpma x v tnmin t sclkih t sclkil
BGM15LA12 figure 3: bus active data receiver timing requirements figure 4: bus park cycle timing data sheet 16 revision 3.0 - 2015-07-24 v tpma x v tpmin v tpma x v tpmin t s t h t h sclk sd a t a t s t sd a t az sclk sd a t a v ohmin v olma x bus p ark cy cle signal driv en signal not driv en, pull do wn only t is measur ed fr om sclk v le v el f or a de vice r eceiving sclk and driving sd a t a lines sd a t az tn v tpma x v tnmin
BGM15LA12 figure 5: bus active data transmission timing speci?cation figure 6: requirements for vio-initiated reset table 13: register mapping register address register name data bits function description default broadcast_id support trigger support r/w 0x0000 register_0 7:0 mode_ctrl module control 00000000 no yes r/w 0x001d product_id 7:0 product_id this is a read-only register. however, during the programming of the usid a write command sequence is per- formed on this register, even though the write does not change its value. 11010001 no no r 0x001e manufacturer_id 7:0 manufacturer_id [7:0] this is a read-only register. however, during the programming of the usid, a write command sequence is per- formed on this register, even though the write does not change its value. 00011010 no no r continued on next page data sheet 17 revision 3.0 - 2015-07-24 t sigol time vio (v) vio ma x vio min v vio-r s t (0.2v) not t o sc ale sclk & sd a t a mus t be held a t lo w le v el fr om deassertion of vio un til the end of t sigol all sla v e r egis t er s se t/r ese t t o manuf actur er ? s de f aults t vio-r s t t vio-r v ohmin v olma x v tpma x v tpmin t d sclk sd a t a t sd a t a o tr t sd a t a o tr t d
BGM15LA12 table 13: register mapping C continued from previous page register address register name data bits function description default broadcast_id support trigger support r/w 0x001c pm_trig 7:6 pwr_mode 00: normal operation 10 yes no r/w 01: default settings (startup) 10: low power (low power) 11: reserved 5 trigger_mask_2 if this bit is set, trigger 2 is disabled. when all triggers disabled, if writing to a register that is associated to trigger 2, the data goes directly to the desti- nation register. 0 no no 4 trigger_mask_1 if this bit is set, trigger 1 is disabled. when all triggers disabled, if writing to a register that is associated to trigger 1, the data goes directly to the desti- nation register. 0 no no 3 trigger_mask_0 if this bit is set, trigger 0 is disabled. when all triggers disabled, if writing to a register that is associated to trigger 0, the data goes directly to the desti- nation register. 0 no no 2 trigger_2 a write of a one to this bit loads trigger 2s registers. 0 yes no 1 trigger_1 a write of a one to this bit loads trigger 1s registers. 0 yes no r/w 0 trigger_0 a write of a one to this bit loads trigger 0s registers. 0 yes no 0x001f man_usid 7:6 spare these are read-only bits that are re- served and yield a value of 0b00 at readback. 00 no no r/w 5:4 manufacturer_id [9:8] these bits are read-only. however, during the programming of the usid, a write command sequence is per- formed on this register even though the write does not change its value. 01 3:0 usid programmable usid. performing a write to this register using the de- scribed programming sequences will program the usid in devices support- ing this feature. these bits store the usid of the device. 0001 0x001a rffe_status 7 software reset 0: normal operation 0 no no r/w 1: software reset 6 command_frame_ parity_err command sequence received with parity error - discard command. 0 no no r 5 command_length_err command length error 0 4 address_frame_ parity_err address frame parity error = 1 0 3 data_frame_ parity_err data frame with parity error 0 2 read_unused_reg read command to an invalid address 0 1 write_unused_reg write command to an invalid address 0 0 bid_gid_err read command with a broad- cast_id or group_sid 0 0x001b group_sid 7:4 reserved 0 no no r/w 3:0 group_sid group slave id 0 data sheet 18 revision 3.0 - 2015-07-24
BGM15LA12 table 14: modes of operation (truth table, register_0) register_0 bits state mode d7 d6 d5 d4 d3 d2 d1 d0 1 isolation x x x 0 0 0 0 0 2 rx1-ao x x x 0 0 0 0 1 3 rx2-ao x x x 0 0 0 1 0 4 rx3-ao x x x 0 1 0 0 0 5 rx4-ao x x x 0 0 1 0 0 6 rx5-ao x x x 1 0 0 0 0 7 rx1&rx2-ao x x x 0 0 0 1 1 8 rx2&rx3-ao x x x 0 1 0 1 0 9 rx3&rx4-ao x x x 0 1 1 0 0 10 rx4&rx5-ao x x x 1 0 1 0 0 11 rx1&rx3-ao x x x 0 1 0 0 1 12 rx2&rx4-ao x x x 0 0 1 1 0 13 rx3&rx5-ao x x x 1 1 0 0 0 14 rx1&rx4-ao x x x 0 0 1 0 1 15 rx2&rx5-ao x x x 1 0 0 1 0 16 rx1&rx5-ao x x x 1 0 0 0 1 data sheet 19 revision 3.0 - 2015-07-24
BGM15LA12 7 application information pin con?guration and function figure 7: BGM15LA12 pin con?guration (top view) table 15: pin de?nition and function pin no. name function 1 sclk mipi rffe clock 2 vio mipi rffe power supply 3 rx5 rf-port rx no. 5 4 rx4 rf-port rx no. 4 5 rx3 rf-port rx no. 3 6 rx2 rf-port rx no. 2 7 rx1 rf-port rx no. 1 8 gnd ground 9 gnd ground 10 ao rf-output port 11 vdd power supply 12 sdata mipi rffe data io 13 gnd ground data sheet 20 revision 3.0 - 2015-07-24 1 3 1 1 2 1 1 1 0 9 8 7 6 5 4 3 3 2
BGM15LA12 application board con?guration figure 8: BGM15LA12 application schematic table 16: bill of materials table name value package manufacturer function c1 (optional) 2 pf 0402 various input matching band 28 2) c2 (optional) 1.1 pf 0402 various input matching band 8 2) c3 (optional) 1.8 pf 0402 various input matching band 20 2) c4 (optional) 2.2 pf 0402 various input matching band 12 2) c5 (optional) 1.5 pf 0402 various input matching band 26 2) c6 (optional) 1 nf 0402 various rf bypass 1) c7 (optional) 1 nf 0402 various rf bypass 1) l1 16 nh 0402 various input matching band 28 2) l2 11 nh 0402 various input matching band 8 2) l3 15 nh 0402 various input matching band 20 2) l4 18 nh 0402 various input matching band 12 2) l5 13 nh 0402 various input matching band 26 2) n1 BGM15LA12 atslp-12-1 in?neon lna multiplexer module 1) rf bypass recommended to mitigate power supply noise. 2) the matching elements must be optimized with reference to the frequency band of interest. each band can be arbiratily assigned to an rf port. the con?guration shown in the table is only an example of the port assignment. data sheet 21 revision 3.0 - 2015-07-24 n i) i) i) i) i) i) i)
BGM15LA12 8 package information figure 9: atslp-12-1 package outline (top, side and bottom views) figure 10: marking speci?cation (top view) data sheet 22 revision 3.0 - 2015-07-24 ppppp p pp p p pp p p pp p p (((( (( ( ((
BGM15LA12 figure 11: footprint recommendation figure 12: atslp-12-1 carrier tape data sheet 23 revision 3.0 - 2015-07-24 dddd d d
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